| Preface |
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iv | |
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ix | |
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1 | (14) |
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1 | (6) |
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7 | (4) |
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11 | (1) |
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11 | (4) |
| Part 1 - Silicon Logic |
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Logic Design with MOSFETs |
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15 | (52) |
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Ideal Switches and Boolean Operations |
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15 | (5) |
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20 | (8) |
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Basic Logic Gates in CMOS |
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28 | (12) |
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Complex Logic Gates in CMOS |
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40 | (15) |
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Transmission Gate Circuits |
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55 | (5) |
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Clocking and Dataflow Control |
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60 | (3) |
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63 | (1) |
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64 | (3) |
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Physical Structure of CMOS Integrated Circuits |
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67 | (48) |
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Integrated Circuit Layers |
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67 | (8) |
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75 | (18) |
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93 | (3) |
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96 | (14) |
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References for Further Reading |
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110 | (1) |
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110 | (5) |
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Fabrication of CMOS Integrated Circuits |
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115 | (32) |
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Overview of Silicon Processing |
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115 | (4) |
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Material Growth and Deposition |
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119 | (7) |
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126 | (6) |
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132 | (8) |
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140 | (6) |
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146 | (1) |
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Elements of Physical Design |
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147 | (44) |
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147 | (3) |
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Layout of Basic Structures |
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150 | (17) |
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167 | (6) |
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FET Sizing and the Unit Transistor |
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173 | (7) |
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Physical Design of Logic Gates |
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180 | (4) |
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184 | (3) |
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References for Further Reading |
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187 | (4) |
| Part 2 - The Logic-Electronics Interface |
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Electrical Characteristics of MOSFETs |
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191 | (46) |
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191 | (7) |
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nFET Current-Voltage Equations |
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198 | (14) |
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212 | (11) |
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223 | (6) |
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Modeling of Small MOSFETs |
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229 | (6) |
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References for Further Reading |
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235 | (1) |
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235 | (2) |
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Electronic Analysis of CMOS Logic Gates |
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237 | (56) |
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DC Characteristics of the CMOS Inverter |
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237 | (7) |
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Inverter Switching Characteristics |
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244 | (13) |
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257 | (3) |
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DC Characteristics: NAND and NOR Gates |
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260 | (6) |
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NAND and NOR Transient Response |
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266 | (6) |
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Analysis of Complex Logic Gates |
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272 | (4) |
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Gate Design for Transient Performance |
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276 | (5) |
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Transmission Gates and Pass Transistors |
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281 | (4) |
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Comments on SPICE Simulations |
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285 | (3) |
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References for Further Study |
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288 | (1) |
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288 | (5) |
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Designing High-Speed CMOS Logic Networks |
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293 | (46) |
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293 | (10) |
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Driving Large Capacitive Loads |
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303 | (10) |
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313 | (14) |
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327 | (8) |
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Books for Further Reading |
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335 | (1) |
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336 | (3) |
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Advanced Techniques in CMOS Logic Circuits |
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339 | (32) |
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339 | (3) |
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342 | (2) |
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344 | (2) |
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346 | (7) |
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Dynamic CMOS Logic Circuits |
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353 | (7) |
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360 | (6) |
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366 | (1) |
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366 | (5) |
| Part 3 - The Design of VLSI Systems |
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System Specifications Using Verilog HDL |
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371 | (32) |
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371 | (2) |
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Structural Gate-Level Modeling |
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373 | (10) |
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383 | (5) |
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388 | (4) |
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Behavioral and RTL Modeling |
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392 | (7) |
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399 | (1) |
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400 | (3) |
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General VLSI System Components |
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403 | (40) |
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403 | (8) |
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411 | (2) |
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Equality Detectors and Comparators |
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413 | (4) |
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417 | (3) |
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Shift and Rotation Operations |
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420 | (4) |
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424 | (7) |
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431 | (5) |
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436 | (3) |
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439 | (1) |
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References for Further Study |
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440 | (1) |
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441 | (2) |
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Arithemetic Circuits in CMOS VLSI |
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443 | (40) |
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443 | (8) |
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451 | (3) |
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454 | (13) |
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467 | (4) |
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471 | (10) |
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481 | (1) |
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481 | (1) |
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481 | (2) |
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Memories and Programmable Logic |
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483 | (40) |
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483 | (5) |
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488 | (10) |
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498 | (8) |
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506 | (7) |
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513 | (6) |
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519 | (1) |
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519 | (4) |
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System-Level Physical Design |
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523 | (48) |
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Large-Scale Physical Design |
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523 | (2) |
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Interconnect Delay Modeling |
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525 | (11) |
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536 | (6) |
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542 | (2) |
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Floorplanning and Routing |
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544 | (5) |
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Input and Output Circuits |
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549 | (9) |
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Power Distribution and Consumption |
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558 | (7) |
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Low-Power Design Considerations |
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565 | (2) |
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References for Further Study |
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567 | (1) |
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568 | (3) |
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VLSI Clocking and System Design |
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571 | (42) |
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571 | (4) |
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575 | (14) |
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589 | (5) |
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Clock Generation and Distribution |
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594 | (12) |
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System Design Considerations |
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606 | (5) |
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References for Advanced Reading |
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611 | (2) |
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Reliability and Testing of VLSI Circuits |
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613 | (24) |
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613 | (7) |
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620 | (7) |
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627 | (9) |
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636 | (1) |
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636 | (1) |
| Index |
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637 | |