Preface |
|
xi | |
|
|
1 | (40) |
|
|
3 | (1) |
|
Binary to Decimal Conversion |
|
|
4 | (2) |
|
Decimal to Binary Conversion |
|
|
6 | (3) |
|
|
9 | (2) |
|
Binary to Octal Conversion |
|
|
11 | (1) |
|
Octal to Binary Conversion |
|
|
12 | (1) |
|
Hexadecimal Number System |
|
|
13 | (1) |
|
Binary to Hexadecimal Conversion |
|
|
14 | (1) |
|
Hexadecimal to Binary Conversion |
|
|
15 | (1) |
|
Binary-Coded Decimal (BCD) |
|
|
16 | (4) |
|
|
20 | (2) |
|
|
22 | (2) |
|
Troubleshooting a 4-Bit Adder |
|
|
24 | (17) |
|
|
26 | (1) |
|
|
27 | (1) |
|
|
28 | (2) |
|
Lab 1A 7483 4-Bit Full Adder |
|
|
30 | (6) |
|
Lab 1B 4008 4-Bit Full Adder |
|
|
36 | (5) |
|
|
41 | (44) |
|
|
43 | (1) |
|
|
43 | (2) |
|
|
45 | (5) |
|
|
50 | (5) |
|
|
55 | (4) |
|
|
59 | (4) |
|
Data Control Enable/Inhibit |
|
|
63 | (1) |
|
|
63 | (1) |
|
|
64 | (1) |
|
|
65 | (1) |
|
|
66 | (1) |
|
|
67 | (1) |
|
|
68 | (1) |
|
|
68 | (1) |
|
|
68 | (1) |
|
|
69 | (1) |
|
|
69 | (1) |
|
|
69 | (1) |
|
|
70 | (15) |
|
|
71 | (1) |
|
|
72 | (2) |
|
|
74 | (4) |
|
|
78 | (4) |
|
|
82 | (3) |
|
Waveforms and Boolean Algebra |
|
|
85 | (68) |
|
|
87 | (3) |
|
Delayed-Clock and Shift-Counter Waveforms |
|
|
90 | (8) |
|
|
98 | (2) |
|
|
100 | (7) |
|
|
107 | (5) |
|
|
112 | (11) |
|
|
123 | (3) |
|
Reducing Boolean Expressions Using Karnaugh Maps |
|
|
126 | (2) |
|
Programmable Logic Devices |
|
|
128 | (4) |
|
Troubleshooting Combinational Logic Circuits |
|
|
132 | (21) |
|
|
134 | (1) |
|
|
135 | (2) |
|
|
137 | (9) |
|
|
146 | (4) |
|
|
150 | (3) |
|
|
153 | (52) |
|
|
155 | (3) |
|
|
158 | (1) |
|
|
159 | (1) |
|
|
160 | (2) |
|
|
162 | (2) |
|
|
164 | (2) |
|
Even/Odd-Parity Generator |
|
|
166 | (2) |
|
|
168 | (2) |
|
9-Bit Parity Generator/Checker |
|
|
170 | (5) |
|
|
175 | (6) |
|
Programmable Logic Devices |
|
|
181 | (12) |
|
Troubleshooting Exclusive-OR Circuits |
|
|
193 | (12) |
|
|
194 | (1) |
|
|
195 | (1) |
|
|
196 | (4) |
|
|
200 | (2) |
|
Lab 4B Parity Generator/Checker |
|
|
202 | (3) |
|
|
205 | (60) |
|
|
207 | (1) |
|
|
208 | (8) |
|
Binary 1's Complement Subtraction |
|
|
216 | (2) |
|
1's Complement Adder/Subtractor Circuit |
|
|
218 | (5) |
|
Binary 2's Complement Subtraction |
|
|
223 | (3) |
|
2's Complement Adder/Subtractor Circuit |
|
|
226 | (6) |
|
Signed 2's Complement Numbers |
|
|
232 | (6) |
|
Binary-Coded-Decimal Addition |
|
|
238 | (2) |
|
Binary-Coded-Decimal Adder Circuit |
|
|
240 | (3) |
|
Arithmetic Logic Unit (ALU) |
|
|
243 | (2) |
|
|
245 | (7) |
|
Troubleshooting Adder Circuits |
|
|
252 | (13) |
|
|
254 | (1) |
|
|
254 | (2) |
|
|
256 | (4) |
|
|
260 | (2) |
|
|
262 | (3) |
|
Specifications and Open-Collector Gates |
|
|
265 | (44) |
|
|
267 | (1) |
|
TTL Electrical Characteristics |
|
|
267 | (6) |
|
|
273 | (1) |
|
TTL Switching Characteristics |
|
|
274 | (4) |
|
|
278 | (2) |
|
Open-Collector Applications |
|
|
280 | (2) |
|
|
282 | (1) |
|
|
282 | (3) |
|
|
285 | (3) |
|
|
288 | (3) |
|
|
291 | (2) |
|
Emitter Coupled Logic (ECL) |
|
|
293 | (2) |
|
Interfacing ECL to Other Logic Families |
|
|
295 | (1) |
|
|
296 | (2) |
|
|
298 | (1) |
|
Troubleshooting TTL and CMOS Devices |
|
|
299 | (10) |
|
|
300 | (2) |
|
|
302 | (1) |
|
|
302 | (2) |
|
Lab 6A Specifications and Open-Collector Gates |
|
|
304 | (3) |
|
Lab 6B Specifications and Open-Drain Inverters |
|
|
307 | (2) |
|
|
309 | (32) |
|
Introduction to Flip-Flops |
|
|
311 | (1) |
|
Crossed NAND SET-RESET Flip-Flops |
|
|
311 | (2) |
|
Crossed NOR SET-RESET Flip-Flops |
|
|
313 | (2) |
|
Comparison of the Crossed NAND and the Crossed NOR SET-RESET Flip-Flops |
|
|
315 | (1) |
|
Using a SET-RESET Flip-Flop as a Debounce Switch |
|
|
316 | (1) |
|
The Gated SET-RESET Flip-Flop |
|
|
317 | (2) |
|
The Transparent D Flip-Flop |
|
|
319 | (3) |
|
The Master-Slave D Flip-Flop |
|
|
322 | (6) |
|
The Pulse Edge-Triggered D Flip-Flop |
|
|
328 | (1) |
|
SET-RESET NAND Gate Flip-Flops Using a PLD |
|
|
328 | (5) |
|
Troubleshooting a Digital Circuit |
|
|
333 | (8) |
|
|
335 | (1) |
|
|
336 | (1) |
|
|
337 | (2) |
|
|
339 | (1) |
|
|
340 | (1) |
|
Master-Slave D and JK Flip-Flops |
|
|
341 | (28) |
|
Toggling a Master-Slave D Flip-Flop |
|
|
343 | (1) |
|
|
344 | (3) |
|
|
347 | (2) |
|
|
349 | (3) |
|
|
352 | (1) |
|
Making a Nonoverlapping Clock |
|
|
353 | (5) |
|
Trouble Shooting JK Flip-Flops |
|
|
358 | (11) |
|
|
361 | (1) |
|
|
362 | (1) |
|
|
362 | (3) |
|
Lab 8A Shift Counter and Delayed Clock |
|
|
365 | (3) |
|
|
368 | (1) |
|
|
369 | (36) |
|
Shift Register Constructed from JK Flip-Flops |
|
|
371 | (1) |
|
|
372 | (1) |
|
|
373 | (2) |
|
Serial Data Transmission Formats |
|
|
375 | (4) |
|
|
379 | (3) |
|
|
382 | (4) |
|
|
386 | (2) |
|
Making an 8-Bit Shift Register with an Asynchronous Clear from the GAL16V8B Programmable Logic Device |
|
|
388 | (1) |
|
Troubleshooting an RS-232C System |
|
|
388 | (17) |
|
|
392 | (1) |
|
|
393 | (1) |
|
|
393 | (2) |
|
|
395 | (8) |
|
|
403 | (2) |
|
|
405 | (34) |
|
|
407 | (1) |
|
The Decode-and-Clear Method of Making a Divide-By-N Ripple Counter |
|
|
408 | (2) |
|
The Divide-By-N Synchronous Counter |
|
|
410 | (4) |
|
|
414 | (2) |
|
|
416 | (3) |
|
|
419 | (6) |
|
The Divide-By-N 1/2 Counter |
|
|
425 | (1) |
|
Making a Divide-by-16 Synchronous Counter |
|
|
426 | (1) |
|
|
427 | (12) |
|
|
430 | (1) |
|
|
431 | (1) |
|
|
432 | (2) |
|
|
434 | (3) |
|
|
437 | (2) |
|
Schmitt-Trigger Inputs and Clocks |
|
|
439 | (24) |
|
The Schmitt-Trigger Input |
|
|
441 | (1) |
|
Using a Schmitt Trigger to Square Up an Irregular Wave |
|
|
441 | (1) |
|
|
442 | (3) |
|
The 555 Timer Used as a Clock |
|
|
445 | (6) |
|
|
451 | (1) |
|
Troubleshooting Clock Circuits |
|
|
452 | (11) |
|
|
454 | (1) |
|
|
455 | (1) |
|
|
456 | (3) |
|
Lab 11A Schmitt Triggers and Clocks |
|
|
459 | (2) |
|
|
461 | (2) |
|
|
463 | (22) |
|
A One-Shot Debounce Switch |
|
|
465 | (1) |
|
|
465 | (2) |
|
The Retriggerable One-Shot |
|
|
467 | (2) |
|
The Nonretriggerable One-Shot |
|
|
469 | (1) |
|
|
470 | (1) |
|
|
471 | (2) |
|
|
473 | (2) |
|
Troubleshooting One-Shots |
|
|
475 | (10) |
|
|
477 | (1) |
|
|
478 | (1) |
|
|
478 | (3) |
|
|
481 | (2) |
|
|
483 | (2) |
|
Digital-To-Analog and Analog-To-Digital Conversions |
|
|
485 | (32) |
|
Resistor Networks for Digital-to-Analog Conversion |
|
|
487 | (4) |
|
The TTL Digital-to-Analog Converter |
|
|
491 | (3) |
|
Analog-to-Digital Conversion Using Voltage Comparators |
|
|
494 | (2) |
|
The Count-Up and Compare Analog-to-Digital Converter |
|
|
496 | (2) |
|
The Successive Approximation Analog-to-Digital Converter |
|
|
498 | (4) |
|
The DAC0830 Digital-to-Analog Converter Integrated Circuit |
|
|
502 | (3) |
|
Making the Logic for a 3-Bit Voltage Comparator Analog-to-Digital Converter |
|
|
505 | (1) |
|
Troubleshooting Digital-to-Analog Converters |
|
|
506 | (11) |
|
|
509 | (2) |
|
|
511 | (1) |
|
|
511 | (2) |
|
Lab 14A Digital-to-Analog and Analog-to-Digital |
|
|
513 | (2) |
|
Lab 14B Analog-to-Digital Converters |
|
|
515 | (2) |
|
Decoders, Multiplexers, Demultiplexers, and Displays |
|
|
517 | (38) |
|
|
519 | (2) |
|
|
521 | (1) |
|
|
522 | (1) |
|
Using a Multiplexer to Reproduce a Desired Truth Table |
|
|
522 | (3) |
|
Multiplexer and Demultiplexer ICs |
|
|
525 | (3) |
|
The 8-Trace Oscilloscope Multiplexer |
|
|
528 | (2) |
|
|
530 | (2) |
|
The Seven-Segment Display |
|
|
532 | (4) |
|
The Liquid Crystal Display |
|
|
536 | (3) |
|
Making a 3-to-8 Decoder from the GAL16V8B Programmable Logic Device |
|
|
539 | (4) |
|
|
543 | (12) |
|
|
545 | (1) |
|
|
546 | (1) |
|
|
547 | (2) |
|
Lab 14a Multiplexers, LEDs, and Seven-Segment Displays |
|
|
549 | (4) |
|
|
553 | (2) |
|
Tri-State Gates and Interfacing To High Current |
|
|
555 | (24) |
|
|
557 | (2) |
|
Tri-State Inverters and Buffers |
|
|
559 | (3) |
|
Computer Buses and the Tri-State Gate |
|
|
562 | (2) |
|
Buffering to High Current and High Voltage |
|
|
564 | (3) |
|
Multiplexing Seven-Segment LED Displays |
|
|
567 | (2) |
|
Isolating One Circuit from Another with Optocouplers |
|
|
569 | (1) |
|
Insulated Gate Bipolar Transistor (IGBT) |
|
|
570 | (2) |
|
Troubleshooting High-Current Digital Circuits |
|
|
572 | (7) |
|
|
573 | (1) |
|
|
574 | (1) |
|
|
575 | (2) |
|
|
577 | (1) |
|
Lab 15B High-Current Interface |
|
|
578 | (1) |
|
Memories and Introduction to Microcomputers |
|
|
579 | (32) |
|
The Microcomputer and Its Parts |
|
|
581 | (1) |
|
The Central Processing Unit |
|
|
581 | (3) |
|
|
584 | (1) |
|
|
585 | (1) |
|
|
586 | (1) |
|
|
586 | (5) |
|
|
591 | (1) |
|
|
592 | (1) |
|
|
593 | (4) |
|
The Input/Output of the Computer |
|
|
597 | (3) |
|
|
600 | (2) |
|
|
602 | (9) |
|
|
604 | (2) |
|
|
606 | (1) |
|
|
606 | (2) |
|
|
608 | (3) |
Appendixes |
|
611 | (22) |
|
|
613 | (4) |
|
|
617 | (2) |
|
|
619 | (8) |
|
D NAND Gates, MOS, and CMOS |
|
|
627 | (6) |
Glossary |
|
633 | (10) |
Answers to Self-Check and Odd-Numbered Questions and Problems |
|
643 | (74) |
Index |
|
717 | |